Nicola Nicolici, Bashir M. Al-Hashimi

Power-Constrained Testing of VLSI Circuits (eBook, PDF)

A Guide to the IEEE 1149.4 Test Standard

• Format: PDF

Produktbeschreibung

This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.

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Produktdetails

• Verlag: Springer New York
• Seitenzahl: 178
• Erscheinungstermin: 11. April 2006
• Englisch
• ISBN-13: 9780306487316
• Artikelnr.: 43998774

Inhaltsangabe

Design and Test of Digital Integrated Circuits.- Power Dissipation During Test.- Approaches to Handle Test Power.- Power Minimization Based on Best Primary Input Change Time.- Test Power Minimization Using Multiple Scan Chains.- Power-conscious Test Synthesis and Scheduling.- Power Profile Manipulation.- Conclusion.