Andere Kunden interessierten sich auch für
![Scheduling Concepts And Testing of Reconfigurable Embedded Core Units]( "Scheduling Concepts And Testing of Reconfigurable Embedded Core Units")
Scheduling Concepts And Testing of Reconfigurable Embedded Core Units48,99 €![Design and performance analysis of low power and high speed dual modulus prescalers]( "Design and performance analysis of low power and high speed dual modulus prescalers")
Design and performance analysis of low power and high speed dual modulus prescalers46,99 €![Nanofluid for Electronics Cooling]( "Nanofluid for Electronics Cooling")
Nanofluid for Electronics Cooling36,99 €![A Guide to Brain Image Enhancement and Segmentation]( "A Guide to Brain Image Enhancement and Segmentation")
A Guide to Brain Image Enhancement and Segmentation23,99 €![A Dual-Rate Model Predictive Controller for Fieldbus Based DCS]( "A Dual-Rate Model Predictive Controller for Fieldbus Based DCS")
A Dual-Rate Model Predictive Controller for Fieldbus Based DCS40,99 €![Soft Core Processor Using Fpga]( "Soft Core Processor Using Fpga")
Soft Core Processor Using Fpga23,99 €![Chaos-based cryptography on FPGA]( "Chaos-based cryptography on FPGA")
Chaos-based cryptography on FPGA51,99 €
Chaotic systems exhibit complex and aperiodic behavior, sensitive dependence on initial conditions and emerge in deterministic nonlinear systems. Due to these features, intensive studies have been carried out on the development of chaos based TRNG structures in recent years. Since this structure gives more reliable source, it is offen used in cryptography for initial vector, generation of private and secure key and in Pseudo RNGs for the production of seed. Digital-based FPGA chips have a big potential for enhancing the capacity of data security in the applications like cryptography and secure communication that provide high performance and processor power. In this book, a new dual entropy core discrete time chaos-based TRNG structure has been implemented on FPGA. The designed units have been synthesized for the Xilinx Virtex-6 FPGA chip using Xilinx ISE simulation program. The data rates of the designed dual entropy core TRNG units range between 390-464 Mbps. In the last step, the generated bit streams obtained from FPGA-based dual entropy core new TRNGs have been subjected to full FIPS 140-1 and NIST 800-22 test suites and all of them passed.