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MGDI technique, in which a low number of transistors are used to reduce the power consumption and area on chip of digital circuits. In this paper the full adder is introduced using MGDI technique. 2 bit comparator, full subtractor were introduced using GDI technique. Then these digital circuits were compared with traditional CMOS transistors in terms of power dissipation, number of transistors, area, speed and delay.

Produktbeschreibung
MGDI technique, in which a low number of transistors are used to reduce the power consumption and area on chip of digital circuits. In this paper the full adder is introduced using MGDI technique. 2 bit comparator, full subtractor were introduced using GDI technique. Then these digital circuits were compared with traditional CMOS transistors in terms of power dissipation, number of transistors, area, speed and delay.
Autorenporträt
Priyanka Sharma é uma investigadora do Departamento de Garantia de Qualidade do ISF College of Pharmacy, Punjab, INDIA. Tem experiência em Validação de Métodos Analíticos através de sofisticados instruimentos. A Dra. Pratik N Chauhan é especialista em Desenvolvimento de Produtos do segmento de Cosméticos-FMCG. Está associado à mesma organização.