Tinghuai Chen

Fault Diagnosis and Fault Tolerance

A Systematic Approach to Special Topics

• Broschiertes Buch

Produktbeschreibung

With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran ce have become more important than before, and hence reveal a lot of interest ing topics which attract many researchers to make a great number of contribu tions to this field. In recent years, many new and significant results have been achieved. A quick scan over the proceedings of the conferences on fault tolerant computing and design automation as well as on testing will convince the reader of that. But unfortunately these achievements have not been entire ly reflected in the textbooks, so that there seems to be a gap for the new researcher who already has the basic knowledge and wants to begin research in this area. As a remedy for this deficiency, this book is intended for begin ners, especially graduate students, as a textbook which will lead them to the frontier of some branches of the fault-tolerant computing field. The first chapter introduces the four-valued logic B4 and its applica tions. In 1966 Roth first proposed this four-valued logic as a technique to generate tests for logical circuits, but this work did not concern the mathe matical basis of B4 itself.

Produktdetails

• Verlag: Springer / Springer Berlin Heidelberg / Springer, Berlin
• Artikelnr. des Verlages: 978-3-540-54962-8
• 1992.
• Seitenzahl: 212
• Erscheinungstermin: 25. Februar 1992
• Englisch
• Abmessung: 242mm x 170mm x 12mm
• Gewicht: 380g
• ISBN-13: 9783540549628
• ISBN-10: 3540549625
• Artikelnr.: 36111531

Autorenporträt

The diagnosis of faults in VLSI chips and the design of chips to be fault-tolerant form the subject of this book. Seven topics are treated at a level appropriate for researchers beginning work in the field. The treatment is formal enough to be widely applicable.

Inhaltsangabe

1 Four-Valued Logic and Its Applications.- 1.1 Introduction.- 1.2 Mathematical Basis.- 1.3 STAR Expansions, Boolean Difference and Boolean Differential.- 1.4 Combined Components.- 1.5 Boolean Equations.- 1.6 Test Generation for Combinational Circuits.- 1.7 Statical Test Generation for Sequential Circuits.- 1.8 Identification of Hazards and Dynamic Testing.- 1.9 Transition Logic.- 1.10 Comparison with Other Logics.- References.- 2 Computer System Diagnosis and Society Diagnosis.- 2.1 Introduction (PMC Model).- 2.2 One Step System Diagnosis for PMC Model.- 2.3 The Extension of System Diagnosis.- 2.4 The Application of System Diagnosis.- References.- 3 Testability Design via Testability Measures.- 3.1 Introduction.- 3.2 Testability Design.- 3.3 Design for Testability at Module Level.- 3.4 Applications.- References.- 4 NMRC: A Technique for Redundancy.- 4.1 Introduction.- 4.2 NMRC System Model.- 4.3 Analysis of Fault Tolerance Capability.- 4.4 Optimal NMRC System Design.- 4.5 An Example for Comparison Analysis.- 4.6 Conclusion.- References.- 4.A.1 The Proof of Theorem 4.4.- 4.A.2 The Proof of Lemma 2.- 5 Fault Tolerance of Switching Interconnection ß-Networks.- 5.1 Introduction.- 5.2 General Inequalities.- 5.3 ISE-MISE-RMISE.- 5.4 C 1n,t ß-networks.- 5.5 RFT Network.- 5.6 Conclusion.- References.- 6 The Connectivity of Hypergraph and the Design of Fault Tolerant Multibus Systems.- 6.1 Introduction.- 6.2 Connectivity of Hypergraph.- 6.3 BIB Design and the Optimized Multibus System.- 6.4 WBIB and the Optimized Multibus System.- 6.4.4 WBIB Design for ?=3.- 6.5 Generation of WBIB to Other Networks.- 6.6 Conclusion.- References.- Appendix: The Proof of Theorem 6.6.- 7 TMR Design of Distributed System for Sequential Faults.- 7.1 Introduction.- 7.2 DFT Concept.- 7.3 The FaultTolerance Degree.- 7.4 The Relationship Between the Architecture and the Fault Tolerance Degree.- 7.5 Optimal Design.- 7.6 Conclusion.- References.