Emerging Nanoelectronic Devices
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Emerging Nanoelectronic Devices focuses on the future direction of semiconductor and emerging nanoscale device technology. As the dimensional scaling of CMOS approaches its limits, alternate information processing devices and microarchitectures are being explored to sustain increasing functionality at decreasing cost into the indefinite future. This is driving new paradigms of information processing enabled by innovative new devices, circuits, and architectures, necessary to support an increasingly interconnected world through a rapidly evolving internet. This original title provides a fresh…mehr

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Produktbeschreibung
Emerging Nanoelectronic Devices focuses on the future direction of semiconductor and emerging nanoscale device technology. As the dimensional scaling of CMOS approaches its limits, alternate information processing devices and microarchitectures are being explored to sustain increasing functionality at decreasing cost into the indefinite future. This is driving new paradigms of information processing enabled by innovative new devices, circuits, and architectures, necessary to support an increasingly interconnected world through a rapidly evolving internet. This original title provides a fresh perspective on emerging research devices in 26 up to date chapters written by the leading researchers in their respective areas. It supplements and extends the work performed by the Emerging Research Devices working group of the International Technology Roadmap for Semiconductors (ITRS). Key features: * Serves as an authoritative tutorial on innovative devices and architectures that populate the dynamic world of "Beyond CMOS" technologies. * Provides a realistic assessment of the strengths, weaknesses and key unknowns associated with each technology. * Suggests guidelines for the directions of future development of each technology. * Emphasizes physical concepts over mathematical development. * Provides an essential resource for students, researchers and practicing engineers.
Autorenporträt
An Chen is with GLOBALFOUNDRIES, working on emerging logic and memory technologies. He is the Memory Technology Lead responsible for exploratory memory research with industrial consortia including IMEC and Sematech. His memory research focuses primarily on RRAM and STTRAM. Prior to GLOBALFOUNDRIES, he worked at Spansion LLC on emerging memory research and at Advanced Micro Devices (AMD) on nanoelectronics. He is currently chairing the Emerging Research Device (ERD) working group in the International Technology Roadmap of Semiconductors (ITRS). He is also a Senior Member of the IEEE. James Hutchby, Senior Scientist, Emeritus, was formerly Director of Device Sciences of Semiconductor Research Corporation (SRC). Prior to joining SRC he was founding Director of the Research Triangle Institute's Center for Semiconductor Research, which consisted of five research groups performing research on: low-temperature growth of diamond; high efficiency multi-bandgap solar cells; complementary HBT devices and integrated circuits and high efficiency thermoelectrics and theremovoltaics. Dr Hutchby has authored or co-authored over 160 contributed and invited papers. He is also a Life Fellow of the IEEE and a recipient of the IEEE Third Millennium Medal. Victor Zhirnov is Director of Special Projects at the SRC. His research interests include nanoelectronics devices and systems, properties of materials at the nanoscale and bio-inspired electronic systems. He also holds an adjunct faculty position at North Carolina State University and has served as an advisor to a number of government, industrial, and academic institutions. Victor Zhirnov has authored and co-authored over 100 technical papers and contributions to books. George Bourianoff is a Senior Principle Engineer in the Components Research group at Intel. He is responsible for developing and managing research programs in emerging research technologies and architectures. He also serves on the scientific advisory boards of the Nanoelectronic Research Initiative (NRI) and the Semiconductor Technology Advanced Research Network. (STARnet). Prior to joining Intel in 1994 Dr Bourianoff was a group leader in the Superconducting Supercollidier Project in Texas responsible for accelerator simulation. Prior to that, he was a Senior Scientist with SAIC responsible for Magneto Hydrodynamic code development.