This book delivers timely coverage of component- and system-level electrostatic discharge (ESD) protection for semiconductor devices and integrated circuits. Illustrated with tables, figures, and case studies, the text brings together contributions from internationally respected researchers and engineers with expertise in ESD design, optimization, modeling, simulation, and characterization. It provides readers with a deeper understanding of ESD events, ESD protection design principles, important aspects of the modeling and simulation of ESD protection solutions, and vital processes including Si CMOS, Si BCD, Si SOI, and GaN technologies.…mehr
This book delivers timely coverage of component- and system-level electrostatic discharge (ESD) protection for semiconductor devices and integrated circuits. Illustrated with tables, figures, and case studies, the text brings together contributions from internationally respected researchers and engineers with expertise in ESD design, optimization, modeling, simulation, and characterization. It provides readers with a deeper understanding of ESD events, ESD protection design principles, important aspects of the modeling and simulation of ESD protection solutions, and vital processes including Si CMOS, Si BCD, Si SOI, and GaN technologies.
Juin J. Liou received his BS (honors), MS, and Ph.D in electrical engineering from the University of Florida, Gainesville, in 1982, 1983, and 1987, respectively. In 1987, he joined the University of Central Florida (UCF), Orlando, where he is now Pegasus distinguished professor, Lockheed Martin St. Laurent professor, and UCF-Analog Devices fellow. Highly decorated and widely published, Dr. Liou holds eight US patents (with five more pending) and several honorary professorships. He is a fellow of IEEE, IET, and Singapore Institute of Manufacturing Technology, and a distinguished lecturer in the IEEE Electron Device Society and National Science Council.
Inhaltsangabe
Introduction to Electrostatic Discharge Protection. Design of Component-Level On-Chip ESD Protection for Integrated Circuits. ESD and EOS: Failure Mechanisms and Reliability. ESD, EOS, and Latch-Up Test Methods and Associated Reliability Concerns. Design of Power-Rail ESD Clamp Circuits with Gate-Leakage Consideration in Nanoscale CMOS Technology. ESD Protection in Automotive Integrated Circuit Applications. ESD Sensitivity of GaN-Based Electronic Devices. ESD Protection Circuits Using NMOS Parasitic Bipolar Transistor. ESD Development in Foundry Processes. Compact Modeling of Semiconductor Devices for Electrostatic Discharge Protection Applications. Advanced TCAD Methods for System-Level ESD Design. ESD Protection of Failsafe and Voltage-Tolerant Signal Pins. ESD Design and Optimization in Advanced CMOS SOI Technology.
Introduction to Electrostatic Discharge Protection. Design of Component-Level On-Chip ESD Protection for Integrated Circuits. ESD and EOS: Failure Mechanisms and Reliability. ESD, EOS, and Latch-Up Test Methods and Associated Reliability Concerns. Design of Power-Rail ESD Clamp Circuits with Gate-Leakage Consideration in Nanoscale CMOS Technology. ESD Protection in Automotive Integrated Circuit Applications. ESD Sensitivity of GaN-Based Electronic Devices. ESD Protection Circuits Using NMOS Parasitic Bipolar Transistor. ESD Development in Foundry Processes. Compact Modeling of Semiconductor Devices for Electrostatic Discharge Protection Applications. Advanced TCAD Methods for System-Level ESD Design. ESD Protection of Failsafe and Voltage-Tolerant Signal Pins. ESD Design and Optimization in Advanced CMOS SOI Technology.
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