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Silicon (Si) is widely viewed as a potential negative electrode material for the next generation of high energy density, rechargeable Li ion batteries. Although Si has a large specific capacity, it generally suffers from poor cycling stability because of mechanical degradation. The large volume expansion that occurs during lithiation is a key problem here. These large volume changes induce cracking and the loss of electrical contact with the current collector. To investigate strategies for engineering architectures that can better accommodate this expansion, we designed an electrochemical cell…mehr

Produktbeschreibung
Silicon (Si) is widely viewed as a potential negative electrode material for the next generation of high energy density, rechargeable Li ion batteries. Although Si has a large specific capacity, it generally suffers from poor cycling stability because of mechanical degradation. The large volume expansion that occurs during lithiation is a key problem here. These large volume changes induce cracking and the loss of electrical contact with the current collector. To investigate strategies for engineering architectures that can better accommodate this expansion, we designed an electrochemical cell that enables us to investigate the stress evolution with different states of charge during lithium insertion and removal. These in situ stress measurements revealed that during lithiation cycles, Si films expand and develop compressive stresses which on further lithium insertion forces Si to flow. During delithiation, these films then contract and eventually exhibit tensile stress. To mitigate such mechanical degradation due to these stresses, we investigated this effect in arrays of patterned Si islands that were fabricated using through mask magnetron sputtering.
Autorenporträt
Sumit was born on Jan 1, 1983 in Jaipur, India. After finishing his B.Tech degree (with honors) from IIT BHU India in 2005, he was awarded with Joseph Gurland Fellowship to pursue Ph.D. degree in Materials Engineering at Brown University, Providence, RI USA. Soon after his PHD. he joined Intel Inc. in Jan 2012 as a Process Development Engineer.