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This book first presents a brief review on hardware implementation of digital watermarking algorithms, followed by development of hardware architecture for spatial domain and Fast Walsh Transform (FWT) domain Spread Spectrum (SS) watermark system design using FPGA. A brief sketch on hardware implementation for bi-orthogonal wavelet based Hilbert transform is also shown which is extended to design Quadrature Carrier Modulation (QCM)-SS watermarking based architectures. Then the hardware for Reversible Watermarking (RW) on digital images based on DE and RCM are presented which are implemented on Xilinx FPGA, Programmable System-on-Chip (P-SoC) and Ultra-scale FPGA for various image sizes.