Design and Implementation of FPGA based 64 bit MAC Unit
Siva Nagendra Reddy P.
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Design and Implementation of FPGA based 64 bit MAC Unit

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Nowadays in VLSI, the technology size, power, and speed are the main constraints to design any circuits. In normal multipliers, delay will be more and the number of computations also will be more. Because of that speed of the circuits designed with the normal multipliers will be low and it will consume more power. This book describes Multiply and Accumulate Unit using Vedic Multiplier and DKG reversible logic gates. The Vedic Multiplier is designed by using Urdhava Triyagbhayam sutra and the adder design is done by using reversible logic to perform high speed operations. Reversible logic gates...