Design and Implementation of AMBA interface on FPGA
An interface between High and Low performance bus
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The communication between high speed and low speed devices is the major issue in the design of any processor and controllers. Advanced Microcontroller Bus Architecture (AMBA) is a protocol that is used as an open standard onchip interconnect specification for the connection and management of the functional blocks in system on chip (SoC). This Book describes the implementation of AMBA interface between high performance bus and low performance bus based on AMBA 2.0 specification. The design of Advanced High performance Bus (AHB) and Advanced Peripheral Bus (APB) interface modules are designed us...
The communication between high speed and low speed devices is the major issue in the design of any processor and controllers. Advanced Microcontroller Bus Architecture (AMBA) is a protocol that is used as an open standard onchip interconnect specification for the connection and management of the functional blocks in system on chip (SoC). This Book describes the implementation of AMBA interface between high performance bus and low performance bus based on AMBA 2.0 specification. The design of Advanced High performance Bus (AHB) and Advanced Peripheral Bus (APB) interface modules are designed using verilog HDL based on the finite state machine operation. The AMBA interface is designed for 32-bit data transfer between AHB and APB module. The designed interface is tested by data transfer between peripheral end modules to processor end module in simulation environment using Xilinx ISE 13.4 design suite with ModelSim 6.3f simulator. The Virtex 5 XC5VLX110T-1FF1136 FPGA is used for hardware implementation of AMBA interface.
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