Andere Kunden interessierten sich auch für
![Design of Systems on a Chip: Design and Test]( "Design of Systems on a Chip: Design and Test")
Design of Systems on a Chip: Design and Test110,99 €![Design of Systems on a Chip: Design and Test]( "Design of Systems on a Chip: Design and Test")
Design of Systems on a Chip: Design and Test110,99 €![Handbook of FPGA Design Security]( "Handbook of FPGA Design Security")
Handbook of FPGA Design Security74,99 €![Handbook of FPGA Design Security]( "Handbook of FPGA Design Security")
Handbook of FPGA Design Security74,99 €![Debugging at the Electronic System Level]( "Debugging at the Electronic System Level")
Debugging at the Electronic System Level74,99 €![Extreme Statistics in Nanoscale Memory Design]( "Extreme Statistics in Nanoscale Memory Design")
Extreme Statistics in Nanoscale Memory Design110,99 €![On and Off-Chip Crosstalk Avoidance in VLSI Design]( "On and Off-Chip Crosstalk Avoidance in VLSI Design")
On and Off-Chip Crosstalk Avoidance in VLSI Design110,99 €
The successful usage of Hardware Description Languages like VHDL and Verilog in design flows is mainly due to the availability of efficient synthesis methods and tools that enable the translation of RTL designs into optimized gate-level implementations. Many expect that the same approach could be effectively adapted at higher levels of abstraction. In the SoCs context, the traditional IC design methodology relying on EDA tools used in a two stages design flow - a VHDL/Verilog RTL specification, followed by logical and physical synthesis - is indeed no more suitable. Thus, actual complex SoCs need new ESL level tools in order to raise the specification abstraction level up to the algorithmic / behavioral one. However, in order to provide the designers with an efficient automated path to implementation, new high-level synthesis tools and approaches are required.
The main expectations from the system design teams concern both methods and tools supporting better managementof the design complexity and reduction of the design cycle all together, breaking the trend to compromise evaluation of various design implementation options. Designing at higher levels of abstraction is an obvious way as it allows a better coping with the system design complexity, to verify earlier in the design process and to increase code reuse.
This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. High-Level Synthesis: from Algorithm to Digital Circuit should be on each designer's and CAD developer's shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design.
The main expectations from the system design teams concern both methods and tools supporting better managementof the design complexity and reduction of the design cycle all together, breaking the trend to compromise evaluation of various design implementation options. Designing at higher levels of abstraction is an obvious way as it allows a better coping with the system design complexity, to verify earlier in the design process and to increase code reuse.
This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. High-Level Synthesis: from Algorithm to Digital Circuit should be on each designer's and CAD developer's shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design.