Multiprocessor System-on-Chip
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Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies…mehr

Produktbeschreibung
Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application.
This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. Provides a state-of-the-art overview of system design using MPSoC architectures; Describes current trends in on-chip communication architectures; Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; Includes coverage of challenges in physical design for multi- and manycore hardware architectures.
  • Produktdetails
  • Verlag: Springer / Springer New York / Springer, Berlin
  • Artikelnr. des Verlages: 12764884
  • Erscheinungstermin: November 2010
  • Englisch
  • Abmessung: 240mm x 165mm x 28mm
  • Gewicht: 560g
  • ISBN-13: 9781441964595
  • ISBN-10: 1441964592
  • Artikelnr.: 29016970
Autorenporträt
Michael Hübner, geboren 1968, arbeitete als Keramiker, Logistiker und freiberuflicher Webdesigner, bevor er das Schreiben für sich entdeckte. Sein erster Thriller war ein großer Lesererfolg und wurde in zahlreichen Foren und Blogs gelobt. Michael Hübners zweite Leidenschaft gilt der Fotografie und dem digitalen Bearbeiten von Bildern. Er lebt mit seiner Frau und drei Töchtern in der Nähe von Koblenz.
Inhaltsangabe
Part 1: Application Mapping and Communication Infrastructure: Virtualization in NOCs--Enhanced MPSOC Robustness and Performance Verification.-HW Support to Exploit Parallelism in Homogeneous and Heterogeneous Multicore System-on-Chip.-PALLAS: Mapping Applications onto Manycore.-Part 2: Reconfigurable Hardware in Multiprocessor Systems: Adaptive Multiprocessor System on Chip Architecture.-Designing FPGA Systems with Many Processors.-Part 3: Physical Design of Multiprocessor Systems: Design tools and methods for chip physical design.-Challenges in Physical Design for Multi- and Manycore Hardware Architectures.