-35%
71,95 €
Bisher 109,99 €**
71,95 €
inkl. MwSt.
**Preis der gedruckten Ausgabe (Gebundenes Buch)
Sofort per Download lieferbar
Bisher 109,99 €**
71,95 €
inkl. MwSt.
**Preis der gedruckten Ausgabe (Gebundenes Buch)
Sofort per Download lieferbar

Alle Infos zum eBook verschenken
Als Download kaufen
Bisher 109,99 €**
-35%
71,95 €
inkl. MwSt.
**Preis der gedruckten Ausgabe (Gebundenes Buch)
Sofort per Download lieferbar
Abo Download
9,90 € / Monat*
*Abopreis beinhaltet vier eBooks, die aus der tolino select Titelauswahl im Abo geladen werden können.

inkl. MwSt.
Sofort per Download lieferbar

Einmalig pro Kunde einen Monat kostenlos testen (danach 9,90 € pro Monat), jeden Monat 4 aus 40 Titeln wählen, monatlich kündbar.

Mehr zum tolino select eBook-Abo
Jetzt verschenken
Bisher 109,99 €**
-35%
71,95 €
inkl. MwSt.
**Preis der gedruckten Ausgabe (Gebundenes Buch)
Sofort per Download lieferbar

Alle Infos zum eBook verschenken
36 °P sammeln

  • Format: PDF


Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in…mehr

Produktbeschreibung
Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource. TOC:Part I. Overview: Introduction. Processor design issues. RISC principles.- Part II. Architectures: MIPS architecture. SPARC architecture. PowerPC architecture. Itanium architecture. ARM architecture.- Part III. Mips Assembly Language: SPIM simulator and debugger. Assembly language overview. Procedures and the stack. Addressing modes. Arithmetic instructions. Conditional execution. Logical and shift operations. Recursion. Floating-point operations.- Appendixes: Number Systems. Character Representation. MIPS Instruction Set Summary. Programming Exercises.- Bibliography.- Index.

Dieser Download kann aus rechtlichen Gründen nur mit Rechnungsadresse in A, B, BG, CY, CZ, D, DK, EW, E, FIN, F, GB, GR, HR, H, IRL, I, LT, L, LR, M, NL, PL, P, R, S, SLO, SK ausgeliefert werden.

  • Produktdetails
  • Verlag: Springer-Verlag GmbH
  • Erscheinungstermin: 06.12.2005
  • Englisch
  • ISBN-13: 9780387274461
  • Artikelnr.: 37287204
Autorenporträt
Sivarama P. Dandamudi, Herzberg Laboratories, Ottawa, ON
Inhaltsangabe
Part I--OVERVIEW: Introduction Processor design issues RISC principles Part II--ARCHITECTURES: MIPS architecture SPARC architecture PowerPC architecture Itanium architecture ARM architecture Part III--MIPS ASSEMBLY LANGUAGE: SPIM simulator and debugger Assembly language overview Procedures and the stack Addressing modes Arithmetic instructions Conditional execution Logical and shift operations Recursion Floating-point operations Appendixes: Number Systems Character Representation MIPS Instruction Set Summary Programming Exercises Bibliography Index