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Band 207

Reduced Thermal Processing for ULSI

Aus der Reihe NATO Science Series B:

49,99 €

inkl. gesetzl. MwSt., Versandkostenfrei

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Beschreibung

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

30.09.2011

Herausgeber

R.A. Levy

Verlag

Springer Us

Seitenzahl

450

Maße (L/B/H)

24,4/17/2,5 cm

Gewicht

781 g

Auflage

1989

Sprache

Englisch

ISBN

978-1-4612-7857-3

Beschreibung

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

30.09.2011

Herausgeber

R.A. Levy

Verlag

Springer Us

Seitenzahl

450

Maße (L/B/H)

24,4/17/2,5 cm

Gewicht

781 g

Auflage

1989

Sprache

Englisch

ISBN

978-1-4612-7857-3

Herstelleradresse

Springer-Verlag GmbH
Tiergartenstr. 17
69121 Heidelberg
DE

Email: GPSR Kontakt

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  • Produktbild: Reduced Thermal Processing for ULSI
  • Produktbild: Reduced Thermal Processing for ULSI
  • Rapid Thermal Processing with Reactive Gases.- Rapid Thermal Processing.- Kinetics of Silicon Dielectrics by RTP.- Applications.- Polysilicon Dielectrics.- Rapid Thermal CVD: In-Situ Device Fabrication.- Summary.- Silicidation by Rapid Thermal Processing.- Reactions in the Salicide Process.- Technological Implementation.- Device Implementation of TiSi2 and CoSi2.- Conclusions.- Microstructural Defects in Rapid Thermally Processed IC Materials.- Microstructural Defects in Implanted and Subsequently Rapid Thermally Annealed Silicon Wafers.- Shallow Emitters (for Bipolar Transistors) from Doped Polysilicon Contacts.- Rapid Thermal Oxidation (RTO).- Rapid Thermal Processing of Silicides.- Concluding Remarks.- Rapid Thermal Annealing — Theory and Practice.- Transfer of Energy in Radiant Heating Systems.- Physics of Rapid Thermal Annealers Using Lamp Sources.- Modelling of Rapid Thermal Annealing — Temperature Control.- Modelling of Rapid Thermal Annealing — Temperature Uniformity.- Temperature Measurement.- Emissivity Measurement.- Temperature Non-Uniformity.- Problems and Solutions.- Practical Machine Designs.- Rapid Thermal Process Integration.- CMOS Device Processing.- Device/Circuit Operation Considerations.- Process Interaction Problems.- Process Integration Opportunities with RTP.- Summary.- to Direct Writing of Integrated Circuit.- Laser Pantography Procedure.- Resolution in Laser Pantography.- Laser Induced Temperature.- Laser Wavelength and Laser Power.- Main Difficulties in Laser Direct Writing.- Deposition and Etching Rates.- Process for Silicon Microelectronics.- Laser Induced Chemical Reactions.- Conclusion.- Ion Beam Assisted Processes.- Defect and Collision Cascade.- Ion Beam Assisted Epitaxy Regrowth.- High Current Implant.- Conclusions.- Micrometallization Technologies.- Metallization Techniques.- Ohmic Contacts.- Gate Contacts.- Barrier Layers.- Interconnections.- Multilevel Interconnect Structures.- Metal Conductor Generation.- Intermetal Insulation and Step Coverage.- Topographical Effects.- Possible Solutions to Multilevel Interconnect Problems.- Speculation on Future Multilevel Interconnect.- Interlevel Dielectrics for Reduced Thermal Processing.- Pre-Metal Planarization Process.- Requirements.- Deposition Process.- Optimization of the Flow Step.- Film Analysis.- Other Methods Involving Oxides.- Multilevel-Metal (MLM) Concepts.- Deposited Layers for MLM.- Planarization Concepts.- Depositions Incorporating In-Situ Etchback.- Conclusion.- Low Temperature Silicon Epitaxy for Novel Device Structures.- Low Temperature Epitaxy.- Auto doping, Transition Width and Dopant Incorporation/Reincorporation.- Buried Layer Pattern Transmittance.- Selective Epitaxial Growth.- Conclusion.- Participants.