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Mixed-Signal Layout Generation Concepts

Aus der Reihe The Springer International Series in Engineering and Computer Science
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Beschreibung

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

08.10.2011

Verlag

Springer Us

Seitenzahl

210

Maße (L/B/H)

23,5/15,5/1,3 cm

Gewicht

341 g

Auflage

2003

Sprache

Englisch

ISBN

978-1-4419-5394-0

Beschreibung

Rezension

From the reviews:



"This book covers high-level placement and routing methods available from the 1970s to the present. For readers who want to learn about available layout algorithms, this book is a must. … Readers will gain insight into what is challenging about routing and how to measure routing quality. … This book is suitable for readers who want to learn about layout algorithms … ." (IEEE Circuits & Devices Magazine, Vol. 21 (4), July/August, 2005)


"Mixed-Signal Layout Generation Concepts is an outstanding text that provides a clear insight on how to efficiently solve the tasks of placement and routing … . The book is timely and well structured. … The quality of all the contributions … is generally high. This book should be of considerable interest for graduate-level students in Electrical Engineering. … It can be also a worthwhile purchase for anyone interested in … VLSI design. I heartily recommend the book to anyone interested in system-on-a-chip design." (Mile Stojcev, Microelectronics Reliability, Vol. 45, 2005)

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

08.10.2011

Verlag

Springer Us

Seitenzahl

210

Maße (L/B/H)

23,5/15,5/1,3 cm

Gewicht

341 g

Auflage

2003

Sprache

Englisch

ISBN

978-1-4419-5394-0

Herstelleradresse

Springer-Verlag GmbH
Tiergartenstr. 17
69121 Heidelberg
DE

Email: ProductSafety@springernature.com

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  • Produktbild: Mixed-Signal Layout Generation Concepts
  • Produktbild: Mixed-Signal Layout Generation Concepts
  • Preface. List of Abbreviations.
    1: Introduction. 1.1. Outline of the Book.
    2: Mapping Problems in the Design Flow. 2.1. Top-Down Flow and Bottom-Up Approach. 2.2. The Mapping Problem. 2.3. Placement and Routing Constraints.
    3: Optimization Methods. 3.1. VLSI Optimization Methods. 3.2. Simulated Annealing. 3.3. Concluding Remarks.
    4: Optimization Approach Based on Simulated Annealing. 4.1. Optimization Flow. 4.2. Problem Representation. 4.3. Perturbation Operators. 4.4. Acceptance and Generation Functions. 4.5. Temperature Schedule. 4.6. Stop Criterion. 4.7. Cost Function. 4.8. Concluding Remarks.
    5: Efficient Algorithms and Data Structures. 5.1. Computational Model. 5.2. Asymptotic Analysis. 5.3. Computational Complexity. 5.4. Data Structures for CAD. 5.5. Concluding Remarks.
    6: Placement. 6.1. Previous Work. 6.2. Effective and Efficient Placement. 6.3. Representation Generality, Flexibility and Sensitivity. 6.4. Sequence Pair Representation. 6.5. Graph-Based Packing Computation. 6.6.Non-Graph-Based Packing Computation. 6.7. Graph-Based Incremental Placement Computation. 6.8. Implementation Considerations. 6.9. Experimental Results. 6.10. Placement-to-Sequence-Pair Mapping. 6.11.Constrained Block Placement. 6.12. Concluding Remarks. 7: Routing. 7.1. The Routing Problem. 7.2. Classification of Routing Approaches. 7.3. Previous Work. 7.4. Computational Complexity. 7.5. Global Routing Model. 7.6. Global Routing Algorithms. 7.7. Benchmarking of Heuristics in Our Routing Model. 7.8. Incremental Routing. 7.9. Impact of Routing on Placement Quality. 7.10. Concluding Remarks.
    8: Dealing with Physical Phenomena: Parasitics, Crosstalk and Process Variations. 8.1. Previous Work. 8.3. Self-Parasitics. 8.4. Crosstalk. 8.5. Process Variations. 8.6. Incorporating Crosstalk and Parasitics into Routing. 8.7. Incorporating Substrate Coupling into Placement. 8.8. Incremental Substrate Coupling Impact Minimization. 8.9. Concluding Remarks.
    9: Conclusions. Bibliography. About the Authors. Index.