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  • Format: ePub

This book describes the digitally intensive time-domain architectures and techniques applied to millimeter-wave frequency synthesis, with the objective of improving performance and reducing the cost of implementation. Coverage includes system architecture, system level modeling, critical building block design, and digital calibration techniques, making it highly suitable for those who want to learn about mm-wave frequency generation for communication and radar applications, integrated circuit implementation, and time-domain circuit and system techniques.
Highlights the challenges of
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Produktbeschreibung
This book describes the digitally intensive time-domain architectures and techniques applied to millimeter-wave frequency synthesis, with the objective of improving performance and reducing the cost of implementation. Coverage includes system architecture, system level modeling, critical building block design, and digital calibration techniques, making it highly suitable for those who want to learn about mm-wave frequency generation for communication and radar applications, integrated circuit implementation, and time-domain circuit and system techniques.

  • Highlights the challenges of frequency synthesis at mm-wave band using CMOS technology
  • Compares the various approaches for mm-wave frequency generation (pros and cons)
  • Introduces the digitally intensive synthesizer approach and its advantages
  • Discusses the proper partitioning of the digitally intensive mm-wave frequency synthesizer into mm-wave, RF, analog, digital and software components
  • Provides detailed design techniques from system level to circuit level
  • Addresses system modeling, simulation techniques, design-for-test, and layout issues
  • Demonstrates the use of time-domain techniques for high-performance mm-wave frequency synthesis

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Autorenporträt
Wanghua Wu finished her PhD at the University of Delft in 2013 where she designed the first-ever 60-GHz all-digital PLL (ADPLL) with programmable wideband frequency modulation capability in 65-nm CMOS (from system modeling to IC implementation and testing software development). In 2013 she won the second-prize award in the Broadcom University Research competition for the Ph.D. work on 60-GHz all-digital PLL. She is currently a design engineer at Marvell Semiconductor Inc.