Design of Cost-Efficient Interconnect Processing Units (eBook, PDF)

Spidergon STNoC

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Streamlined Design Solutions Specifically for NoCTo solve critical network-on-chip (NoC) architecture and design problems related to structure, performance and modularity, engineers generally rely on guidance from the abundance of literature about better-understood system-level interconnection networks. However, on-chip networks present several distinct challenges that require novel and specialized solutions not found in the tried-and-true system-level techniques.A Balanced Analysis of NoC ArchitectureAs the first detailed description of the commercial Spidergon STNoC architecture, Design of C...

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