XCore XS1- L1
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Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. The XS1-L1 is a processor designed by XMOS. It is a 32-bit processor, that runs up to 8 concurrent threads. It was available as of June 2009 running at 400 MHz. Each thread can run at up to 100 MHz; four threads follow each other through the pipeline, resulting in a top speed of 400 MIPS if at least four threads are active. The 400 MIPS of each core is equally distributed over all active threads. This allows the use of extra threads in order to hide latency. The XS1-L...
Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. The XS1-L1 is a processor designed by XMOS. It is a 32-bit processor, that runs up to 8 concurrent threads. It was available as of June 2009 running at 400 MHz. Each thread can run at up to 100 MHz; four threads follow each other through the pipeline, resulting in a top speed of 400 MIPS if at least four threads are active. The 400 MIPS of each core is equally distributed over all active threads. This allows the use of extra threads in order to hide latency. The XS1-L1 comprises a single core processor and a switch. The execution core has a data path, a memory, and register banks for eight threads. The switches of two or more XS1-L1 processors can be connected using a link, whereupon threads can communicate with each other by exchanging messages through the switches.
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