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This text explores VLSI fault modelling and testing techniques and covers such topics as: physical fault modelling and simulation for VSLI MOS circuits; designing CMOS gates to test open faults; testing bridging faults in VLSI; and testable design synthesis models.

Produktbeschreibung
This text explores VLSI fault modelling and testing techniques and covers such topics as: physical fault modelling and simulation for VSLI MOS circuits; designing CMOS gates to test open faults; testing bridging faults in VLSI; and testable design synthesis models.
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Autorenporträt
George W. Zobrist