Power Integrity Techniques in Nanometer VLSI Design
Jeffrey Fan
Broschiertes Buch

Power Integrity Techniques in Nanometer VLSI Design

A Technical Reference Book for Fabless IC Designers and VLSI Manufacturers in Academia and Industry

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This book includes three major components in details: (1) Efficient algorithms to reduce the voltage noise of on-chip power grid networks without considering process variations in traditional VLSI design are discussed. The algorithms are based on the Sequence of Linear Programming (SLP) as the optimization engine and a scheme through circuit partitioning to handle large-sized million nodes of circuit analysis. (2) A statistical model order reduction technique called Statistical Spectrum Model Order Reduction (SSMOR) is proposed to address the variation of nanometer VLSI fabrication. The analys...