Phase Locked Loop Design as a Frequency Multiplier
George Tom Varghese
Broschiertes Buch

Phase Locked Loop Design as a Frequency Multiplier

A Systematic Approach Towards PLL

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High-performance digital systems use clocks to sequence operations and synchronize between functional units and between ICs. Clock frequencies and data rates have been increasing with each generation of processing technology and processor architecture. Phase locked-loops (PLLs) are widely used to generate well-timed on-chip clocks in high-performance digital systems. A PLL is a closed loop frequency system that locks the phase of an output signal to an input reference signal. PLL s are widely used in computer, radio, and telecommunications systems where it is necessary to stabilize a generated...