PARLE Parallel Architectures and Languages Europe
Vol.1: Parallel Architectures, Eindhoven, The Netherlands, June 15-19, 1987; Proceedings
Herausgegeben: Bakker, Jacobus W. de; Nijman, A. J.; Treleaven, Philip C.
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Learning translation invariant recognition in a massively parallel networks.- Trace theory and systolic computations.- Boltzmann machines and their applications.- Cobweb-2: Structured specification of a wafer-scale supercomputer.- A novel deadlock free and starvation free packet switching communication processor.- A parallel architecture for signal understanding through inference on uncertain data.- An axiomatic approach to the specification of distributed computer architectures.- Computing on a systolic screen: Hulls, contours and applications.- Multiprocessor systems programming in a high-le...
Learning translation invariant recognition in a massively parallel networks.- Trace theory and systolic computations.- Boltzmann machines and their applications.- Cobweb-2: Structured specification of a wafer-scale supercomputer.- A novel deadlock free and starvation free packet switching communication processor.- A parallel architecture for signal understanding through inference on uncertain data.- An axiomatic approach to the specification of distributed computer architectures.- Computing on a systolic screen: Hulls, contours and applications.- Multiprocessor systems programming in a high-level data-flow language.- The twisted cube.- An implemented method for incremental systolic design.- The use of parallel functions in system design.- The translation of processes into circuits.- Mapping strategies in message based multiprocessor systems.- Hardware memory management for large knowledge bases.- Transputer-based experiments with the ZAPP architecture.- Synthesis of systolic arrays for inductive problems.- Practical parallelism using transputer arrays.- Systolic array synthesis by static analysis of program dependencies.- Specification of a pipelined event driven simulator using FP2.- A layered emulator for design evaluation of MIMD multiprocessors with shared memory.- The Alliant FX/Series: A language driven architecture for parallel processing of dusty deck fortran.- Emulating digital logic using transputer networks (very high parallelism = simplicity = performance).- A two-level approach to logic plus functional programming integration.- Overview of a parallel reduction machine project.- An overview of DDC: Delta driven computer.- Design and implementation of a parallel inference machine for first order logic: an overview.- Multi-level simulator for VLSI.- The DOOM system and its applications: A survey of esprit 415 subproject A, philips research laboratories.
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