Optimized Hardware Realization of Computationally Intensive Algorithms
Syed Manzoor Qasim
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Optimized Hardware Realization of Computationally Intensive Algorithms

Using Field Programmable Gate Array

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Computationally Intensive algorithms such as those used in image and signal processing, multimedia, telecommunications, cryptography, networking and computation in general were first realized using software running on programmable Digital Signal Processors (DSPs) or microprocessors. However, with advancements in Very Large Scale Integration (VLSI) technology, hardware realization has become an attractive alternative. Significant speedup in computation time can be achieved by assigning complex computation intensive tasks to hardware and by exploiting the inherent parallelism in the algorithms. ...