Modeling and Simulation of System In Package
Electro-Thermal Modeling
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For the robust development of System in Package, increasing of the engineering efficiency and reducing costs, a careful electrical and thermo- mechanical design is found to be vital. The focus of this book is on how to create and simulate effective electrical and thermal models of SiP. The first part is devoted to a new method for I/O buffer simulation, designed on the basis of IBIS methodology and by using VHDL-AMS language. The discussed VHDL-AMS model demonstrates a good performance when compared to the transistor level model. With respect to the IBIS model, an improvement in simulation acc...
For the robust development of System in Package, increasing of the engineering efficiency and reducing costs, a careful electrical and thermo- mechanical design is found to be vital. The focus of this book is on how to create and simulate effective electrical and thermal models of SiP. The first part is devoted to a new method for I/O buffer simulation, designed on the basis of IBIS methodology and by using VHDL-AMS language. The discussed VHDL-AMS model demonstrates a good performance when compared to the transistor level model. With respect to the IBIS model, an improvement in simulation accuracy of at least 38% is observed. The second part is a presentation of an accurate and efficient thermal model of BGA multi-chip package. This model is sufficiently simple and precise to permit evaluation of the package characteristics in the early phase of design for an optimal SiP design from the thermal point of view. The model was validated by performing simulations with multi-heat sources under various boundary conditions. It was observed that the presented model can predict the junction temperature with an error below 10%, with respect to 3D numerical simulations.
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