Layout-Aware Analog Synthesis Methodology
Raoul Badaoui
Broschiertes Buch

Layout-Aware Analog Synthesis Methodology

Approaches for Parasitic-Inclusive Symbolic Circuit Representation and Extraction for Synthesis

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Layout-induced parasitics have significant effects on the behavior of circuits in general and the performance of high-frequency analog ones in particular. To achieve parasite-inclusive performance-closure, layout-aware circuit synthesis methodologies are beginning to emerge. In layout-in-the-loop synthesis methodologies, performance analysis is based on the generation of a concrete layout for the explored circuit sizes. A parasite-inclusive circuit is extracted from the layout using a standard extractor and is analyzed using a simulator to determine whether the required constraints are met; th...