Sivarama P. Dandamudi

Broschiertes Buch

Guide to RISC Processors

For Programmers and Engineers

Beschreibung

Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource.

Autor

Here is an accessible, comprehensive guide to all the popular modern RISC (Reduced Instruction Set Computer) processors: MIPS, SPARC, PowerPC, ARM and Itanium. It details RISC design principles as well as explains the differences between RISC and CISC designs. It also covers MIPS assembly language programming. Professionals and programmers seeking an authoritative and practical overview of RISC processors will find the guide an essential resource.

Produktdetails

• Verlag: Springer / Springer New York / Springer, Berlin
• Softcover reprint of hardcover 1st ed. 2005
• Seitenzahl: 388
• Erscheinungstermin: 30. September 2010
• Englisch
• Abmessung: 254mm x 175mm x 25mm
• Gewicht: 757g
• ISBN-13: 9781441919359
• ISBN-10: 144191935X
• Artikelnr.: 32171911