Fundamental Aspects of Ultrathin Dielectrics on Si-based Devices
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An extrapolation of ULSI scaling trends indicates that minimum feature sizes below 0.1 mu and gate thicknesses of
An extrapolation of ULSI scaling trends indicates that minimum feature sizes below 0.1 mu and gate thicknesses of <3 nm will be required in the near future. Given the importance of ultrathin gate dielectrics, well-focused basic scientific research and aggressive development programs must continue on the silicon oxide, oxynitride, and high K materials on silicon systems, especially in the critical, ultrathin 1-3 nm regime. The main thrust of the present book is a review, at the nano and atomic scale, the complex scientific issues related to the use of ultrathin dielectrics in next-generation Si-based devices. The contributing authors are leading scientists, drawn from academic, industrial and government laboratories throughout the world, and representing such backgrounds as basic and applied physics, chemistry, electrical engineering, surface science, and materials science.
Audience: Both expert scientists and engineers who wish to keep up with cutting edge research, and new students who wish to learn more about the exciting basic research issues relevant to next-generation device technology.
Audience: Both expert scientists and engineers who wish to keep up with cutting edge research, and new students who wish to learn more about the exciting basic research issues relevant to next-generation device technology.
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