Estimation of Analog Layout Parasitics with Parameterized Polygons
I-Lun Tseng
Broschiertes Buch

Estimation of Analog Layout Parasitics with Parameterized Polygons

Algorithms for Partitioning Parameterized Polygons

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Traditional analog integrated circuit design methodologies split circuit synthesis and physical layout design into different phases. Since analog circuits are usually very sensitive, physical layout effects, such as parasitics, can have significant influence on the performance and even the functionality of the design. Lack of considering layout effects in the circuit synthesis phase can result in numerous re-design iterations. Developing new analog design flows, methodologies, and automation tools are thus required in order to solve the problem. This book describes a new analog circuit design ...