Dithered Binary Oversampling Analog to Digital Converter
New ADC architecture
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Two generations of the BDO converter were implemented using 0.5 µm-CMOS technology to demonstrate their functionality. We also implemented a first order continuous time sigma delta modulator on the same integrated chip to compare both architectures. We compared both converters in terms of size, power, resolution and robustness. The proposed binary dithered oversampled converter was significantly smaller in size, consumed less power and achieved comparable resolution to that of the first order sigma delta modulator. In terms of robustness, sigma delta modulator can achieve higher resolution if...
Two generations of the BDO converter were implemented using 0.5 µm-CMOS technology to demonstrate their functionality. We also implemented a first order continuous time sigma delta modulator on the same integrated chip to compare both architectures. We compared both converters in terms of size, power, resolution and robustness. The proposed binary dithered oversampled converter was significantly smaller in size, consumed less power and achieved comparable resolution to that of the first order sigma delta modulator. In terms of robustness, sigma delta modulator can achieve higher resolution if we increase the oversampling ratio and use higher order integrators. The tradeoff here is an increase in size and power consumption in addition to facing some stability issues due to the high order integrators. On the other hand, the BDO converter can increase its resolution by optimizing some of its components, such as enhancing the high-pass filter responsible for the blue noise shaping, without radically increasing its size or power consumption.
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