Design of Low Noise Amplifier Using 0.18 um CMOS Technology
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Low Noise Amplifiers (LNAs) for wireless applications have attracted significant research interest and various approaches to the design of narrowband LNAs (operating below 3 GHz) and wideband LNAs(operating above 3 GHz) have been proposed previously. Distributed amplifiers can provide very large bandwidth because of their unique gain-bandwidth trade-off. However, large power consumption and chip area make them unsuitable for typical low-power, low cost wireless applications. Common-gate amplifiers exhibit excellent wide band input matching, but suffer from a relatively large noise figure (NF)....
Low Noise Amplifiers (LNAs) for wireless applications have attracted significant research interest and various approaches to the design of narrowband LNAs (operating below 3 GHz) and wideband LNAs(operating above 3 GHz) have been proposed previously. Distributed amplifiers can provide very large bandwidth because of their unique gain-bandwidth trade-off. However, large power consumption and chip area make them unsuitable for typical low-power, low cost wireless applications. Common-gate amplifiers exhibit excellent wide band input matching, but suffer from a relatively large noise figure (NF). Narrow-band LNAs like an inductively degenerated common-source amplifier can also be converted into a wideband one by adding a wideband input matching network However, the insertion loss of the passive input matching degrades the NF rapidly with frequency. Resistive-feedback amplifiers have very good wideband input matching characteristics. However, low NF and low power consumption can be hardly achieved simultaneously across a large frequency range. Noise cancellation technique is used to relax this trade-off in resistive feed-back amplifiers.
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