Design Automation for Timing-Driven Layout Synthesis

Design Automation for Timing-Driven Layout Synthesis

Versandkostenfrei!
Versandfertig in 1-2 Wochen
115,99 €
inkl. MwSt.
Weitere Ausgaben:
PAYBACK Punkte
58 °P sammeln!
Moore's law [Noy77], which predicted that the number of devices in tegrated on a chip would be doubled every two years, was accurate for a number of years. Only recently has the level of integration be gun to slow down somewhat due to the physical limits of integration technology. Advances in silicon technology have allowed Ie design ers to integrate more than a few million transistors on a chip; even a whole system of moderate complexity can now be implemented on a single chip. To keep pace with the increasing complexity in very large scale integrated (VLSI) circuits, the productivity of chip...