Cryptographic True Random Number Generator with Malfunction Detector
Mathematical Model of the Noise Source, Synthesis and Testing in FPGAs, and Built-In Malfunction Detector Architecture
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Each cryptographic system incorporates basic cryptographic primitives including True Random Number Generators (TRNGs) since random values are mandatory for the several algorithms and protocols. Thus, even strong cryptographic system can be weakened by the TRNG of poor quality. The book presents a new high-entropy digital element suitable for TRNG synthesis in FPGAs. The original idea behind this principle lies in the randomness extraction on oscillatory trajectory when a bi-stable circuit is resolving a foregoing metastable event. We propose a new bi-stable structure Transition Effect Ring Osc...
Each cryptographic system incorporates basic cryptographic primitives including True Random Number Generators (TRNGs) since random values are mandatory for the several algorithms and protocols. Thus, even strong cryptographic system can be weakened by the TRNG of poor quality. The book presents a new high-entropy digital element suitable for TRNG synthesis in FPGAs. The original idea behind this principle lies in the randomness extraction on oscillatory trajectory when a bi-stable circuit is resolving a foregoing metastable event. We propose a new bi-stable structure Transition Effect Ring Oscillator (TERO) where the oscillatory phase can be forced on demand. Our proposed mathematical model, simulations and hardware experiments show that TERO is significantly more sensitive to intrinsic noise in FPGA logic cells and less sensitive to global perturbations than a ring oscillator composed of the same elements. A disfunction of TERO-based TRNG can be evaluated on-line using proposed malfunction detector. The quality of generated 1-Gbit random sequences was evaluated by the NIST 800-22 statistical tests with satisfactory results over the wide core voltage range and temperature range.
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