Safety-critical real-time systems must guarantee correct operation
in all operational conditions - even if these conditions are very
unlikely to occur (rare events). Hardware-in-the-Loop (HiL)
simulation is a common validation technique of real-time systems.
In an HiL simulation the environment of a System-Under-Test (SUT)
is simulated by an assigned HiL simulator. Thereby, the SUT
interacts with the HiL simulator in real-time which necessitates a
model of time and interfaces of the HiL simulator that are
identical to the model of time and the interfaces of the SUT. In
this book an HiL simulation framework is proposed that allows
predictable interaction of a distributed HiL simulator and an SUT.
This HiL simulation framework comprises configurable simulation
components which are interconnected via a time-triggered
interaction mechanism. Information flow between the HiL simulator
and the SUT is strictly controlled by the progression of
synchronized global time and bound to a priori known latency and
jitter. This book addresses researchers and engineers in
safety-critical domains such as the avionics or automotive
industries.
Martin Schlager received a master degree in computer sciences and a doctoral degree in technical sciences, both from the Vienna University of Technology. He is affiliated with TTTech Computertechnik AG since 2001, being in charge of R&D project coordination of national and European research projects. Martin Schlager is member of the IEEE.
