Analog Design Issues in Digital VLSI Circuits and Systems
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Analog Design Issues in Digital VLSI Circuits and Systems brings together in one place important contributions and up-to-date research results in this fast moving area. Analog Design Issues in Digital VLSI Circuits and Systems serves as an excellent reference, providing insight into some of the most challenging research issues in the field.…mehr

Produktbeschreibung
Analog Design Issues in Digital VLSI Circuits and Systems brings together in one place important contributions and up-to-date research results in this fast moving area.
Analog Design Issues in Digital VLSI Circuits and Systems serves as an excellent reference, providing insight into some of the most challenging research issues in the field.
  • Produktdetails
  • Verlag: Springer, Berlin; Springer Us
  • Softcover reprint of the original 1st ed. 1997
  • Seitenzahl: 160
  • Erscheinungstermin: 22. März 2013
  • Englisch
  • Abmessung: 260mm x 195mm x 8mm
  • Gewicht: 353g
  • ISBN-13: 9781461377955
  • ISBN-10: 1461377951
  • Artikelnr.: 39512339
Autorenporträt
Professor Dr. Eby Friedman, Department of Electrical & Computer Engineering, University of Rochester, Rochester, New York 14627-0231, USA.
Inhaltsangabe
Circuit Analysis and Simulation. Selection of Voltage Thresholds for Delay Measurement; V. Chandramouli, K.A. Sakallah. Delay and Power Expressions for a CMOS Inverter Driving a Resistive-Capacitive Load; V. Adler, E.G. Friedman. Mixed Analog Digital Simulation of Integrated Circuits with BRASIL; U. Bretthauer, E.-H. Horneber. Ramp Input Response of RC Tree Networks; E.G. Friedman, J.H. Mulligan, Jr. Novel Circuit Design Techniques. A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High-Speed and Mixed-Signal VLSIC; I.E. Ungan, M. Askar. Design and Evaluation of Adiabatic Arithmetic Units; M.C. Knapp, et al. Filter Design Using a New Field-Programmable Analog Array (FPAA); H. Kutuk, S. Kang. Robust Design. CMOS PLL Design in a Digital Chip Environment; D.A. Ramey. di/dt Noise in CMOS Integrated Circuits; P. Larsson. Latin Hypercube Sampling Monte Carlo Estimation of Average Quality Index for Integrated Circuits; M. Keramat, R. Kielbasa. Analysis of Metastable Operation in a CMOS Dynamic D-Latch; J. Juan- Chico, et al.