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Until recently, ASIC designers have mostly focused on how to achieve the desired performance requirements, and the typical ASIC design flow pays limited attention to power. In comparison, some custom designs have significantly advanced techniques for low power, such as voltage islands, substrate biasing, and sleep mode power gating. It is widely acknowledged that custom designed chips can achieve low poer at the same performance compared to ASIC chips designed in an EDA flow. However, the significance of different low power design approaches has not yet been explored in detail. In Closing the…mehr

Produktbeschreibung
Until recently, ASIC designers have mostly focused on how to achieve the desired performance requirements, and the typical ASIC design flow pays limited attention to power. In comparison, some custom designs have significantly advanced techniques for low power, such as voltage islands, substrate biasing, and sleep mode power gating. It is widely acknowledged that custom designed chips can achieve low poer at the same performance compared to ASIC chips designed in an EDA flow. However, the significance of different low power design approaches has not yet been explored in detail. In Closing the POWER Gap between ASIC & Custom, the significance of different low power design approaches is explored in detail. This book will cover how to use low power design approaches in an automated design flow, and examine the design time and performance trade-offs of low power design. The introductory chapters outline factors affecting the power consumption of ASIC and custom designs, then explore how each factor can contribute to custom designs being lower power than ASICs. Also detailed are custom techniques that can be applied in an ASIC design methodology, and what other alternatives there are for ASIC designs to bridge the power gap. The second section of the book focuses on the latest tools and techniques for low power design that may be applied in an ASIC design flow. A final section provides low power design examples and where some of these techniques have been applied. TOC:Introduction and Overview.- Contributing Factors.- Microarchitectural Techniques to Reduce Power Consumption.- Choice of Supply Voltages and Threshold Voltages to Meet Performance Targets and Reduce Power.- Process Technology and Process Variation.- Design Techniques.- Heuristics for Circuit Sizing, Threshold Voltage Assignment, and Supply Voltage Assignment.- Level Converters and Their Power and Performance Tradeoffs.- Gate-level cell Placement with Multiple Supply Voltages.- Design Examples.- Dynamic Voltage Scaling and Other Low Power Techniques in the ARM11.- Low Power Design Techniques in Transmeta's Processors.

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  • Produktdetails
  • Verlag: Springer-Verlag GmbH
  • Erscheinungstermin: 23.01.2008
  • Englisch
  • ISBN-13: 9780387689531
  • Artikelnr.: 37287791
Autorenporträt
Until recently, ASIC designers have mostly focused on how to achieve the desired performance requirements, and the typical ASIC design flow pays limited attention to power. In comparison, some custom designs have significantly advanced techniques for low power, such as voltage islands, substrate biasing, and sleep mode power gating. Butt custom designed chips can achieve low power at the same performance compared to ASIC chips designed in an EDA flow. In Closing the POWER Gap between ASIC & Custom, the significance of different low power design approaches is explored in detail. This book covers how to use low power design approaches in an automated design flow, and examine the design time and performance trade-offs of low power design. After chapter which outline factors affecting the power consumption of ASIC and custom designs and explore how each factor can contribute to custom designs being lower power than ASICs, the book focuses on the latest tools and techniques for low power design that may be applied in an ASIC design flow.
Inhaltsangabe
Overview of the Factors Affecting the Power Consumption.- Pipelining to Reduce the Power.- Voltage Scaling.- Methodology to Optimize Energy of Computation for SOCs.- Linear Programming for Gate Sizing.- Linear Programming for Multi-Vth and Multi-Vdd Assignment.- Power Optimization using Multiple Supply Voltages.- Placement for Power Optimization.- Power Gating Design Automation.- Verification For Multiple Supply Voltage Designs.- Winning the Power Struggle in an Uncertain Era.- Pushing ASIC Performance in a Power Envelope.- Low Power ARM 1136JF-S Design.