126,99 €
versandkostenfrei*


inkl. MwSt.
Sofort lieferbar
Bequeme Ratenzahlung möglich!
ab 6,19 € monatlich
63 °P sammeln

    Gebundenes Buch

This book covers advanced techniques in modern circuit placement. It details all of most recent placement techniques available in the field and analyzes the optimality of these techniques. Coverage includes all the academic placement tools that competed against one another on the same industrial benchmark circuits at the International Symposium on Physical Design (ISPD), these techniques are also extensively being used in industrial tools as well. The book provides significant amounts of analysis on each technique such as trade-offs between quality-of-results (QoR) and runtime.…mehr

Produktbeschreibung
This book covers advanced techniques in modern circuit placement. It details all of most recent placement techniques available in the field and analyzes the optimality of these techniques. Coverage includes all the academic placement tools that competed against one another on the same industrial benchmark circuits at the International Symposium on Physical Design (ISPD), these techniques are also extensively being used in industrial tools as well. The book provides significant amounts of analysis on each technique such as trade-offs between quality-of-results (QoR) and runtime.
  • Produktdetails
  • Integrated Circuits and Systems
  • Verlag: Springer, Berlin
  • Artikelnr. des Verlages: 11774846
  • Erscheinungstermin: Oktober 2007
  • Englisch
  • Abmessung: 241mm x 165mm x 27mm
  • Gewicht: 710g
  • ISBN-13: 9780387368375
  • ISBN-10: 038736837X
  • Artikelnr.: 22144637
Inhaltsangabe
Benchmarks.- ISPD 2005/2006 Placement Benchmarks.- Locality and Utilization in Placement Suboptimality.- Flat Placement Techniques.- DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective.- Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model.- Top-Down Partitioning-Based Techniques.- Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability.- Congestion Minimization in Modern Placement Circuits.- Multilevel Placement Techniques.- APlace: A High Quality, Large-Scale Analytical Placer.- FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm.- mFAR: Multilevel Fixed-Points Addition-Based VLSI Placement.- mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control.- NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs.- Conclusion and Challenges.