Ashok K Goel

High-Speed VLSI Interconnections

• Gebundenes Buch

Produktbeschreibung

This Second Edition focuses on emerging topics and advances in the field of VLSI interconnections

In the decade since High-Speed VLSI Interconnections was first published, several major developments have taken place in the field. Now, updated to reflect these advancements, this Second Edition includes new information on copper interconnections, nanotechnology circuit interconnects, electromigration in the copper interconnections, parasitic inductances, and RLC models for comprehensive analysis of interconnection delays and crosstalk.

Each chapter is designed to exist independently or as a part of one coherent unit, and several appropriate exercises are provided at the end of each chapter, challenging the reader to gain further insight into the contents being discussed. Chapter subjects include:
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Preliminary Concepts
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Parasitic Resistances, Capacitances, and Inductances
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Interconnection Delays
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Crosstalk Analysis
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Electromigration-Induced Failure Analysis
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Future Interconnections

High-Speed VLSI Interconnections, Second Edition is an indispensable reference for high-speed VLSI designers, RF circuit designers, and advanced students of electrical engineering.

Produktdetails

• Wiley Series in Microwave and Optical Engineering 1
• Verlag: Wiley & Sons
• 2. Aufl.
• Seitenzahl: 432
• Erscheinungstermin: 17. September 2007
• Englisch
• Abmessung: 236mm x 165mm x 26mm
• Gewicht: 735g
• ISBN-13: 9780471780465
• ISBN-10: 0471780464
• Artikelnr.: 22801160

Autorenporträt

AShok k. Goel, PhD, is Associate Professor of Electrical Engineering at Michigan Technological University. He is the author of more than thirty journal publications and numerous conference proceedings. His research interests include nanotechnology circuit design, high-speed VLSI interconnections, device physics and modeling, and semiconductor TCAD.

Inhaltsangabe

Preface. 1. Preliminary Concepts and More. Exercises. References. 2.
Parasitic Resistances, Capacitances and Inductances. Exercises. References.
3. Interconnection Delays. Exercises. References. 4. Crosstalk Analysis.
Exercises. References. 5. Electromigration-Induced Failure Analysis.
Exercises. References. 6. Future Interconnections. Exercises. References.
CD-ROM. Appendix 2.1: Listing of the Program "IPCSGV" for Calculating the
Parasitic Capacitances for Single Level Interconnections on GaAs-Based VLSI
Using the Green's Function Method. Appendix 2.2: Listing of the Program
"ICIMPGV" for Calculating the Parasitic Capacitances and Inductances for
Multilevel Interconnections on GaAs-Based VLSI Using the Network Analogue
Method. Appendix 2.3: Listing of the Program "EPCSGM" for Calculating the
Electrode Parasitic Capacitances in a Single-Gate GaAs MESFET. Appendix
3.1: Listing of the Program "PDSIGV" for Calculating the Propagation Delays
in the Single Level Interconnections on GaAs-Based VLSI. Appendix 3.2:
Listing of the Program "IPDMSR" for Calculating the Propagation delays in
an Interconnection Driven by Minimum Size Repeaters. Appendix 3.3: Listing
of the Program "IPDOSR" for Calculating the Propagation delays in an
Interconnection Driven by Optimum Size Repeaters. Appendix 3.4: Listing of
the Program "IPDCR" for Calculating the Propagation delays in an
Interconnection Driven by Cascaded Repeaters. Appendix 4.1: Listing of the
Program "DCMPVI" for Delay and Crosstalk Analysis of Multilevel Parallel
VLSI Interconnections. Appendix 4.2: Listing of the Program "SPBIGV" for
Signal Propagation Analysis of Bilevel Crossing Interconnections on
GaAs-Based VLSI. Appendix 5.1: Listing of the Program "EMVIC" for
Electromigration-Induced Failure Analysis of VLSI Interconnection
Components. Index.